When there is a resource that is shared by multiple requestors, one requestor can use the resource in a specific period (typically one clock cycle) it is necessary to have an arbiter that accepts requests and ensures that the one requestor is granted use of the resource. Examples of shared resources include a network, bus, and silicon backplane. Many situations require fair arbitration for a resource, where fair arbitration means that every requestor participating in the arbitration process should win arbitration at least one out of N arbitrations where N is the number of active requesters. In a fair arbitration scheme the worst case request-grant latency is N arbitrations for an N-requestor arbiter.
Round robin arbitration is a commonly used fair arbitration policy because it ensures equal and fair access to a resource. In a round robin arbitration policy the requestors are assigned a fixed order of priority rotation. For example, the order of three requestors could be R1, R2, R3 and back to R1. The requestor that was granted the token last is considered the lowest priority and the requester after it is considered the highest priority. For example, if R2 was the last unit to be granted a request, then R3 would be the highest priority, followed by R1 and finally R3. If R3 requests and is granted the token, then it would become the lowest priority, so the arbitration order would be R1, R2, then R3.
Another form of round robin arbitration uses a ring counter to cycle the priority of each of the requestors by selecting one of N fixed-priority arbiters. Every time a request is granted the ring counter advances by one. This approach is less desirable in many applications than the approach above where the requester is made the lowest priority, because it doesn't distribute the bandwidth as evenly when there are inactive requesters.
One prior art implementation of a combinational logic block arbitration mechanism at least three levels deep to determine a request to grant delay time is illustrated in FIG. 1. In this example, at least three levels of logic gates with accompanying fan out exist to determine the arbitration process between the requesting devices. A first level of AND logic gates feeds input signals to a second level of logic gates which then feeds input signals to a third level of AND logic gates labeled U8A-U8C. The input connections from state registers and request signal inputs, labeled A-F, fan out to the first level of logic gates. The output connections from the first level of logic gates fan in then until an ultimate grant decision can be made by the third level of logic gates labeled U8A-U8C. The timing of the request to grant delay time degrades linearly with number requestors in the ring and the number of levels of logic needed to make a final grant determination.